In current chip scale package technology, the typical size of a chip scale package is reduced to a dimension that is relatively close to that of a silicon die. At the same time, the demand for high current and low voltage supply in modern chips that contain integrated circuits, such as high power switch-mode voltage regulator circuits (power devices), continues to increase. Accordingly, chip manufacturers are faced with trade-offs between high current handling capability and the device size of such a power device. That is, in order to achieve high current handling capability, the device size has to be both thick and large in order to handling high power and enable heat to dissipate from the power device. On the other hand, in order to reduce the size of a power device, the current handled by each power device is generally reduced.
FIG. 1A illustrates a top plan view of a prior art semiconductor die 100 that exhibits the trade-off between the die size and its current handling capability. Prior art semiconductor die 100 includes a substrate 101, a passivation layer 102, bond pads 103, and an array of contact areas 104. Substrate 101 further includes a preformed integrated circuit, such as high power switch-mode voltage regulator integrated circuits and metal conductive traces (not shown). Passivation layer 102, such as a silicon dioxide (SiO2) or a silicon nitrate (Si3N4) film, is disposed over substrate 101 and bond pads 103. Bond pads 103 may include source electrodes, drain electrodes, and gate electrodes of high power switch-mode voltage regulator integrated circuits. A plurality of openings is formed on passivation layer 102 directly over bond pads 103 to create the array of contact areas 104.
FIG. 1B illustrates a side view of prior art semiconductor die 100 of FIG. 1A taken along the width (Y-dimension) of contact area 104. As shown, prior-art semiconductor die 100 includes substrate 101 having bond pads 103 overlaid by a passivation layer 102. Passivation layer 102 includes openings over bond pads 103 that define contact areas 104. FIG. 1C illustrates a side view of the prior art semiconductor die 100 of FIG. 1A taken along the length (X-dimension) of contact areas 104. As shown, each conventional metal contact area 104 has its length (X-dimension) equal to its width (Y-dimension). When a switch-mode voltage regulator integrated circuit carrying a large current is used in semiconductor die 100, power efficiency is degraded because high conduction loss results in heat dissipation due to high interconnection resistance. At a high current and power efficiency level, there are three main areas in an integrated circuit device where interconnection resistance can be reduced: in the circuit package, in the component, and in the interconnects. Among them, the circuit package and the interconnects are the most important factors that contribute to high interconnect resistance. This is especially true when the “ON” drain to source resistance (RDS(ON)) has been intentionally decreased due to the improvement in semiconductor manufacturing process. Therefore, a chip scale package containing high-power transistors that achieve low interconnection resistance is crucial to the performance and operability of today consumer electronics.
Semiconductor die 100 and its chip scale package cannot further reduce interconnection resistance when the demand for high current handling capability continues to increase. This is because the prior-art chip scale package that houses semiconductor die 100 does not have any capability to reduce interconnection resistance which becomes more and more significant as the amount of output current increases. Furthermore, as semiconductor die 100 and contact areas 104 become smaller, the corresponding current density in contact pads 104 becomes larger. High current density can cause device failures due to electro-migration of aluminum particles of contact areas 104 into substrate 101. Eventually, the electro-migration phenomenon causes open-circuits in the prior-art chip scale package that contains semiconductor die 100.